1. Technical Field
The present invention relates to a method and apparatus for testing in general, and in particular to a method and apparatus for testing digital channel circuitry. Still more particularly, the present invention relates to a method and apparatus for testing digital read channel circuits of data storage devices.
2. Description of the Prior Art
A magnetic recording channel within a magnetic storage device, such as a magnetic tape drive, is designed to accept data for storage and to deliver, without error, the same in response to a subsequent retrieval demand. During data retrieval, self-clocking modulation codes are typically employed to ensure an adequate minimum rate of signal transitions for clock synchronization, without exceeding the maximum transition storage density of the magnetic storage medium during data storage. Such self-clocking modulation codes are preferably run-length-limiting (RLL) codes that represent a one-to-one mapping of binary data into a constrained binary sequence that is then recorded on the magnetic storage medium in the form of a non-return-to-zero (NRZ) waveform.
For an NRZ waveform, the maximum and minimum number of spaces between consecutive transitions correspond to the maximum and minimum run lengths of zeros between two consecutive ones in a corresponding binary sequence, as is well-known in the prior art. Thus, the self-clocking modulation codes within the RLL codes are characterized by parameters (D, K), where D represents the minimum and K represents the maximum number of zeros between two consecutive ones in the code sequence. These codes are the result of the steady evolution of waveform design coupled with improvements in magnetic recording channels, including improved clocking and signal-detection processors.
Generally speaking, a magnetic recording channel includes a write path for writing data to and a read path for reading data from a magnetic storage medium. The write path usually includes a digital write channel and a write driver, and the read path usually includes an analog processor, an analog-to-digital converter, and a digital read channel. The present invention discloses a method and apparatus for testing the integrity of the digital read channel circuit, as well as a formatter/deformatter that is coupled between the digital read channel circuit and the digital write channel circuit.